CV | Chaitanya Mamatha Ananda | University of California, Riverside

Computer Science Ph.D. candidate specializing in LLVM-based compiler optimization, with a research focus on improving data and code locality. Experience in profile-guided optimization, post-link binary optimization, and AI-driven code-layout optimization.

Programming: C++, C, Python, NumPy; Linux, Git
Compilers: LLVM, BOLT, Propeller, profile-guided optimization (PGO/FDO), post-link optimization, interprocedural optimization, basic block reordering and deduplication, code layout, heap locality
Performance: x86, Arm (AArch64), perf, hardware performance counters, profiling, benchmarking
ML for Compiler Optimization: AlphaEvolve, Vizier, MLGO, Evolution Strategies, heuristic search

Sep 2022 - Present

Ph.D. in Computer Science

University of California, Riverside
2021

B.E. in Computer Science and Engineering

Bangalore Institute of Technology, India

Sep 2025 - May 2026
Student Researcher

Google, Sunnyvale, CA
- Developed AI-PROPELLER, extending Google's Propeller with AI-driven interprocedural code-layout optimization for warehouse-scale binaries; used AlphaEvolve and hardware counters to guide heuristic search.
- Reduced execution time by 1.6% on LLVM Clang and 0.23% on a production Search workload.
Sep 2022 - Present
Ph.D. Researcher

University of California, Riverside, CA
- Developed PreFix, a profile-guided heap-layout optimization that groups hot objects to improve data locality; reduced execution time by 21.7% on average.
- Developed DeduBB, a post-link basic block deduplication technique implemented in BOLT and Propeller for x86 and AArch64; reduced binary size by up to 25.8%.
- Handled stack-manipulating code across modules; used profiles to deduplicate cold blocks and preserve performance.
Aug 2019 - May 2022
Undergraduate Researcher

Indian Institute of Science, Bengaluru, India
- Built a parallel programming model for PDE solvers using Regent/Legion; developed a scientific-data anomaly detector using statistical and deep-learning methods.
Spring 2021
Project Trainee

Robert Bosch Engineering and Business Solutions
- Developed scripts to synchronize video and radar data collected during automated test driving.

PreFix: Developed PreFix, a novel optimization technique for heap-intensive applications that achieves near perfect separation of hot objects, improving spatial locality and application performance. PreFix employs profiling-guided hot object identification, preallocated memory regions, and object recycling, resulting in an average execution time reduction of 21.7% (up to 74%), significantly outperforming existing solutions like HDS and HALO.
DeduBB: Developed a framework for reducing the size of production binaries on x86 and Arm architectures at the post-link stage.
AI-Propeller: Developed an agentic workflow that evolves compiler heuristics into a fine-grained interprocedural optimizer using hardware counters for a precise reward signal. Evaluated on large warehouse-scale applications, showing 0.23% to 1.6% performance improvements over state-of-the-art FDO and PLO.

PreFix: Optimizing the Performance of Heap-Intensive Applications.
C. Mamatha Ananda, R. Gupta, S. Tallam, H. Shen, and X. D. Li.
CGO 2025
DeduBB: Binary Code Size Reduction via Post-Link Basic Block Deduplication.
C. Mamatha Ananda, M. Afarin, R. Gupta, S. Tallam, H. Shen, and X. D. Li.
LCTES 2026
AI-PROPELLER: Warehouse-Scale Interprocedural Code Layout Optimization with AlphaEvolve.
C. Mamatha Ananda, R. Gupta, M. Trofin, A. Grossman, S. Tallam, X. D. Li, and A. Yazdanbakhsh.
MLArchSys 2026; CAIS AID-Wild 2026 (workshops)

Generate Better Code Layout Heuristics | Co-inventor, Google | Patent filed June 2026